1. Field of the Invention
The present disclosure relates generally to supply voltage regulation, and more specifically to a system and method for scaling supply voltage based on temperature.
2. Description of the Related Art
The performance of an integrated circuit (IC) implemented with CMOS semiconductor device fabrication technology depends on various factors including cell delay, in which cell delay varies with temperature among other factors. Cell delay is inversely proportional to the mobility and directly proportional to the threshold voltage. Mobility and threshold voltage both decrease with an increase in temperature. A decrease in threshold voltage tends to decrease cell delay, whereas a decrease in mobility tends to increase cell delay. In this manner, cell delay is dictated by which of the two factors, mobility and threshold voltage, have the more dominant effect. If the supply voltage (the gate overdrive voltage) is much larger than the threshold voltage, to the extent that the variation of the threshold voltage due to temperature is negligible, then mobility becomes the dominant factor for cell delay change with temperature. The result is that cell delay increases with temperature. If the supply voltage is not much larger than the threshold voltage, however, then the variation of threshold voltage due to temperature has a significant effect on cell delay so that threshold voltage becomes the dominant factor.
A higher supply voltage, such as about 1.2 Volts (V), was used for semiconductor fabrication technologies above 65 nanometers (nm). A lower supply voltage, such as down to about 0.9V, may often be used when CMOS technology is scaled below 65 nm, such as 55 nm, 40 nm, 28 nm, etc., so that the effect of threshold voltage becomes more prevalent resulting in temperature inversion. In this manner, for lower supply voltages, the cell delay decreases with increased temperature. Every 10 millivolts (mV) reduction in supply voltage can have about a 2-3% performance impact due to the relative elevation of threshold voltage.
A system on a chip (SOC) design may be implemented to operate within a pre-specified optimal frequency range to balance power consumption, performance and reliability. The performance parameters are more difficult to achieve, however, at extreme temperature corners, such as −40 degrees Celsius (° C.) and +165° C. Another factor impacting performance and efficiency is the type of devices implemented on the IC, particularly those in critical timing paths. Although devices implemented with a low threshold voltage (LVT) are generally faster with higher performance, LVT devices have relatively high leakage current as compared standard threshold voltage (SVT) devices and high threshold voltage (HVT) devices. It is often desired to use less leaky devices, such as HVT and SVT, to improve leakage power while reaching a higher frequency target for a given power budget. Furthermore, the supply grids that provide power to devices distributed across the IC have a resistance that develops a voltage caused by load current. The voltage drop on the ground supply grid may also have a negative impact on performance.